1. Field of the Invention
The present invention relates generally to a semiconductor device and a method for manufacturing the same, and more specifically, to a gate electrode structure and a wiring structure having the same shape as a gate electrode of MISFETs (metal insulator semiconductor field effect transistors).
2. Description of the Background Art
Either of conductive silicon single layer structure (e.g., poly-Si) and silicide/conductive silicon stacked structure (e.g., WSi2/poly-Si and CoSi2/poly-Si) has mainly been adopted for a conventional gate electrode and wiring.
However, in situations where MISFETs mid wirings are miniaturized as high integration of semiconductor integrated circuits proceeds, if the above-mentioned structures remain unchanged, the resistance value of a gate electrode and wiring is increased. The result is that the amount of signal delay in the gate electrode and wiring is increased, thereby diminishing the merit of high speed operation owing to miniaturization.
For instance, in case of CoSi2/poly-Si stacked structure, the sheet resistance of CoSi2 is relatively low, namely about 7 xcexa9, which in some cases may not be so large demerit over signal delay. However, since the CoSi2/poly-Si stacked structure is formed by salicide (self aligned silicide) method, it is difficult to form a SAC (self aligned contact) structure while employing the CoSi2/poly-Si stacked structure.
As used herein, the term xe2x80x9cSAC structurexe2x80x9d indicates the structure in which an insulting film such as a silicon nitride film is formed on the upper and side surfaces of a gate electrode and wiring. This insulating film functions to prevent the gate electrode and contact holes from being short-circuited even if alignment deviates when contact holes toward source/drain regions are formed in an interlayer insulating film. As high integration is advanced, the margin of the distance between the gate electrode and the contact holes toward the source/drain regions is reduced and thus liable to cause short-circuit. Hence, the SAC structure is becoming increasingly essential to high integrated semiconductor devices.
Since in salicide method a gate electrode and source/drain regions are simultaneously subjected to silicidation, an insulating film of SAC structure cannot be formed prior to salicide method. Therefore, the insulating film of SAC structure should be formed after passing through the process with salicide method.
In this state, it is however difficult to form an insulating film on the upper and side surfaces of the gate electrode. If an insulating film is formed by using photolithography and etching techniques, in some cases, alignment of the insulating film itself may deviate and fail to prevent short-circuit between the gate electrode and contact holes. For this reason, it is difficult to form the SAC structure while employing the CoSi2/poly-Si stacked structure.
It an also be considered to form the CoSi2/poly-Si stacked structure by polycide method in place of salicide method. However, the CoSi2/poly-Si stacked structure cannot be formed by polycide method because any suitable method for patterning the CoSi2/poly-Si stacked structure has not presently been discovered.
As a gate electrode structure and a wiring structure, there has been proposed a polymetal gate electrode having a metal/barrier film/conductive silicon stacked structure that can further reduce sheet resistance than the conductive silicon single layer structure or silicide/conductive silicon stacked structure and also can form the SAC structure. Such gate electrode structure and wiring structure are introduced in, e.g., xe2x80x9cA Novel 0.15 xcexcm CMOS Technology using W/WNx/Polysilicon Gate Electrode and Ti Silicided Source/Drain Diffusionsxe2x80x9d IEDM ""96, pp. 455-458, and xe2x80x9cFormation mechanism of ultrathin WSiN barrier layer in a W/WNx/Si systemxe2x80x9d Applied Surface Science 117/118 (1997), pp. 312-316.
FIG. 12 illustrates a polymetal gate electrode structure. In FIG. 12, a polymetal gate electrode is formed via a gate insulating film 2 (e.g., oxide film) oil a semiconductor substrate 1 (e.g., silicon substrate). The polymetal gate electrode has such a structure that a conductive silicon film 3 (e.g., poly-Si film), a barrier film 5 (e.g., WNx film or WSiN film) and a metal film 6 (e.g., W film) are stacked over the semiconductor substrate 1 in the order named.
In the polymetal gate electrode, sheet resistance is extremely small, namely about 5 xcexa9 or below, thereby to minimize the amount of signal delay in the gate electrode and wiring. This makes it possible to sufficiently utilize the merit of high speed operation owing to miniaturization.
In addition, the SAC structure can be formed easily because no formation process such as salicide method is employed. Referring to FIG. 12, before the conductive silicon film 3, barrier film 5 and metal film 6 are formed into the gate electrode and wiring, an insulating film (not shown) is further patterned on the metal film 6 and then shaped into a gate electrode and wiring by using photolithography and etching techniques. This results in the gate electrode and wiring having the insulating film on the upper surface thereof. Subsequently, the usual side wall formation process is carried out to obtain the SAC structure.
The reason why the barrier film 5 is used in the polymetal gate electrode structure is as follows.
In the case of a simple two-layer stacked structure such as of metal/conductive silicon, when it passes through a high temperature process inherent in the process of manufacturing a semiconductor device, respective contact parts of metal and silicon react with each other to form a silicide layer at the interface therebetween. The resistance value of the silicide layer is usually higher than that of metal, thus leading to an increased resistance value of the gate electrode and wiring.
In order to avoid such a silicide layer formation phenomenon, the barrier layer is provided. When W is used for the metal film 6 in FIG. 12, the above-mentioned WNx film or WSiN film suppresses the mutual diffusion of metal and silicon, and functions as the barrier film 5. Since the barrier film 5 avoids formation of a silicide layer, the resistance value of the gate electrode and wiring can be maintained low even after passing through the high temperature process.
However, the polymetal gate electrode employing a WNx film or WSiN film as a barrier film, has the following drawback that the resistance value between metal and conductive silicon cannot be minimized and the resistance value between metal and conductive silicon is not stable to the current density variation. This will be described by referring to FIG. 13. As used herein, the term xe2x80x9cthe resistance value between metal and conductive siliconxe2x80x9d is a value obtained by dividing the potential difference between the conductive silicon film 3 and metal film 6 by the current density passing therethrough.
FIG. 13 is a graph showing the result of measurement of the resistance-current density characteristic between metal and conductive silicon in the polymetal gate electrode of FIG. 12. In FIG. 13, the ordinate represents resistance Re and the abscissa represents current density J.
As shown in FIG. 13, the resistance value between metal and conductive silicon is approximately 1xc3x9710xe2x88x925 xcexa9xc2x7cm2 or more, which cannot be said to be sufficiently low value. This has made it difficult to suppress signal delay due to the resistance between metal and conductive silicon.
Further, as shown in FIG. 13, with respect to the current density variation, the resistance value between metal and conductive silicon is unstable and exhibits non-ohmic property. Thus, the gate voltage varies as the current density varies. This has made it difficult to say that the polymetal gate electrode employing a WNx film or WSiN film as a barrier film is suited as a gate electrode.
The foregoing drawbacks seem to be due to high resistance of the WNx film or WSiN film as being a barrier film.
According to a first aspect of the invention, a semiconductor device comprises a substrate, a conductive silicon film overlying the substrate, a silicide film overlying the conductive silicon film and containing metal atoms and silicon atoms, a barrier film overlying the silicide film and having any one of a first combination containing metal atoms, nitrogen atoms and silicon atoms, a second combination containing silicon atoms and at least one of oxygen atoms and nitrogen atoms, and a third combination containing metal atoms and nitrogen atoms, and a metal film overlying the barrier film.
According to a second aspect of the invention, the semiconductor device of the first aspect is characterized in that the metal atoms contained in the silicide film is of one or a plurality of types selected from the group consisting, of W, Mo, Ti, Ta, Nb, V, Zr, Hf, Cr and Co.
According to a third aspect of the invention, the semiconductor device of the first aspect is characterized in that the barrier film has the first or third combination, and that the metal atoms contained in the barrier film is of one or a plurality of types selected from the group consisting of W, Mo, Ti, Ta, Nb, V, Zr, Hf, Cr and Co.
According to a fourth aspect of the invention, the semiconductor device of the first aspect is characterized in that the conductive silicon film contains a dopant, and that the silicide film is formed in the shape of discontinuous islands.
According to a fifth aspect of the invention, a method of manufacturing a semiconductor device comprises the steps of: (a) forming a conductive silicon film on a substrate; (b) forming a silicide film containing metal atoms and silicon atoms on the conductive silicon film; (c) forming, on the silicide film, a barrier film having any one of a first combination containing metal atoms, nitrogen atoms and silicon atoms, a second combination containing silicon atoms and at least one of oxygen atoms and nitrogen atoms, and a third combination containing metal atoms and nitrogen atoms; (d) forming a metal film on the barrier film; and (e) patterning the conductive silicon film, the silicide film, the barrier film and the metal film by using photolithography and etching techniques.
According to a sixth aspect of the invention, the method of the fifth aspect is characterized in that the barrier film has the fix combination, and that the step (c) includes the steps of: (c1) forming a metal nitride film containing metal atoms and nitrogen atoms; and (c2) performing a heat treatment for allowing the silicon atoms contained in the silicide film to react with the metal nitride film, to form a barrier film containing metal atoms, nitrogen atoms and silicon atoms.
According to a seventh aspect of the invention, the method of the fifth aspect is characterized in that the barrier film has the first combination, and that the step (c) includes the steps of: (c1) forming a metal nitride film containing metal atoms and nitrogen atoms; and (c2) performing, after the step (e), a heat treatment for allowing the silicon atoms contained in the silicide film to react with the metal nitride film, to form a barrier film containing metal atoms, nitrogen atoms and silicon atoms.
According to an eighth aspect, the method of the fifth aspect further comprises the steps of: (f) introducing a dopant into the conductive silicon film; and (g) performing a heat treatment of the silicide film so as to be formed in the shape of discontinuous islands.
According to a ninth aspect of the invention, the method of the eighth aspect is characterized in that the thickness of the silicide film is set to about not more than 10 nm.
According to a tenth aspect of the invention, the method of tie fifth aspect is characterized in that the metal atoms contained in the silicide film is of one or a plurality of types selected from the group consisting of W, Mo, Ti, Ta, Nb, V, Zr, Hf, Cr and Co.
According to an eleventh aspect of the invention, the method of the fifth aspect is characterized in that the barrier film has the first or third combination, and that the metal atoms contained in the barrier film is of one or a plurality of types selected from the group consisting of W, Mo, Ti, Ta, Nb, V, Zr, Hf, Cr and Co.
According to a twelfth aspect of the invention, a CMOS transistor comprises at least two semiconductor devices of the fourth aspect as first and second semiconductor devices, wherein structures including the conductive silicon film, the silicide film, the barrier film and tie metal film of the first and second semiconductor devices are used as gate electrodes, gate insulating films a disposed between the substrate and the conductive silicon film of the first and second semiconductor devices, respectively, wells and source/drain regions are disposed in the substrate of the first and second semiconductor devices, respectively, and the conductive silicon films are electrically connected between the first and second semiconductor devices.
The first, second or third aspect enables to realize a semiconductor device comprising the polymetal gate electrode exhibiting low resistance property and ohmic property because the silicide film is interposed between the conductive silicon film and barrier film.
In the fourth aspect, since the silicide film is formed in the shape of discontinuous islands, even if the silicide film sucks up the dopant in the conductive silicon film, the dopant is hard to move across the islands by the presence of the conductive silicon film interposed therebetween.
The fifth, tenth or eleventh aspect enables to manufacture the semiconductor device of the first aspect.
The sixth aspect enables to manufacture the semiconductor device of the first aspect. In addition, since a barrier film is formed by using the thermal reaction between the silicide film and metal nitride film, the resulting barrier film is extremely thin, thereby effectively suppressing an increase in the resistance value between metal and conductive silicon.
The seventh aspect has the same effects as the method of the sixth aspect.
The eighth aspect enables to manufacture the semiconductor device of the fourth aspect.
With the ninth aspect, the silicide film is apt to condense in an island shape.
In the twelfth aspect, since the structure including the conductive silicon film, silicide film, barrier film and metal film in the semiconductor device of the fourth aspect is used as a gate electrode, the dopant is hard to move across the gate electrodes of the first and second semiconductor devices, and the threshold voltage value is therefore hard to change.
It is an object of the present invention to provide a semiconductor device comprising a polymetal gate electrode that can prevent formation of a silicide layer at the interface between metal and conductive silicon and also exhibit low resistance property and ohmic property, as well as a method for manufacturing the same.
These and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings.